34.20.10 SMC Write Protection Status Register

Name: SMC_WPSR
Offset: 0xE8
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
       SWETYP[1:0] 
Access RR 
Reset 00 
Bit 2322212019181716 
 WPVSRC[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 WPVSRC[7:0] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
     SWESEQE WPVS 
Access RRR 
Reset 000 

Bits 25:24 – SWETYP[1:0] Software Error Type (Cleared on read)

ValueNameDescription
0 READ_WO

A write-only register has been read.

1 WRITE_WO

A write access has been performed on a read-only register.

2 UNDEF_RW

Access to an undefined address.

Bits 23:8 – WPVSRC[15:0] Write Protection Violation Source

When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.

Bit 3 – SWE Software Control Error (Cleared on read)

ValueDescription
0

No software error has occurred since the last read of SMC_WPSR.

1

A software error has occurred since the last read of SMC_WPSR. The field SWETYP details the type of software error; the associated incorrect software access is reported in the field WPVSRC (if WPVS=0).

Bit 2 – SEQE Internal Sequencer Error (Cleared on read)

ValueDescription
0

No internal sequencer error has occurred since the last read of SMC_WPSR.

1

An internal sequencer error has occurred since the last read of SMC_WPSR. This flag can only be set under abnormal operating conditions.

Bit 0 – WPVS Write Protection Violation Status

ValueDescription
0

No write protection violation has occurred since the last read of the SMC_WPSR.

1

A write protection violation occurred since the last read of the SMC_WPSR. If this violation is an unauthorized attempt to write a protected register, the associated violation is reported into field WPVSRC.