50.7.4.1 CAN Bit Timing Configuration

All controllers on a CAN bus must have the same bit rate and bit length. At different clock frequencies of the individual controllers, the bit rate has to be adjusted by the time segments.

The CAN protocol specification partitions the nominal bit time into four different segments.

Figure 50-4. Partition of the CAN Bit Time
  • SYNC SEG: SYNChronization Segment

    This part of the bit time is used to synchronize the various nodes on the bus. An edge is expected to lie within this segment. It is one TQ long.

  • PROP SEG: PROPagation Segment

    This part of the bit time is used to compensate for the physical delay times within the network. It is twice the sum of the signal’s propagation time on the bus line, the input comparator delay, and the output driver delay. It is programmable to be 1,2,..., 8 TQ long.

    This parameter is defined in the PROPAG field of the CAN Baudrate Register.

  • PHASE SEG1, PHASE SEG2: PHASE Segment 1 and 2

    The Phase-Buffer-Segments are used to compensate for edge phase errors. These segments can be lengthened (PHASE SEG1) or shortened (PHASE SEG2) by resynchronization.

    Phase Segment 1 is programmable to be 1, 2, ..., 8 TQ long.

    Phase Segment 2 length has to be at least as long as the Information Processing Time (IPT) and may not be more than the length of Phase Segment 1.

    These parameters are defined in the PHASE1 and PHASE2 fields of the CAN Baudrate Register.

  • TIME QUANTUM

    The TIME QUANTUM (TQ) is a fixed unit of time derived from the peripheral clock period. The total number of TIME QUANTA in a bit time is programmable from 8 to 25.

  • INFORMATION PROCESSING TIME

    The Information Processing Time (IPT) is the time required for the logic to determine the bit level of a sampled bit. The IPT begins at the sample point, is measured in TQ and is fixed at two TQ for the CAN. Since Phase Segment 2 also begins at the sample point and is the last segment in the bit time, PHASE SEG2 shall not be less than the IPT.

  • SAMPLE POINT

    The SAMPLE POINT is the point in time at which the bus level is read and interpreted as the value of that respective bit. Its location is at the end of PHASE_SEG1.

  • SJW: ReSynchronization Jump Width

    The ReSynchronization Jump Width defines the limit to the amount of lengthening or shortening of the phase segments.

    SJW is programmable to be the minimum of PHASE SEG1 and four TQ.

If the SMP field in the Baudrate register (CAN_BR) is set, then the incoming bit stream is sampled three times with a period of half a CAN clock period, centered on sample point.

In the CAN controller, the length of a bit on the CAN bus is determined by the parameters (BRP, PROPAG, PHASE1 and PHASE2).

t BIT = t CSC + t PRS + t PHS1 + t PHS2

The time quantum is calculated as follows:

t CSC = BRP + 1 / t peripheral clock
Note: The BRP field must be within the range [1, 0x7F], i.e., BRP = 0 is not authorized.
t PRS = t CSC × PROPAG + 1
t PHS1 = t CSC × PHASE1 + 1
t PHS2 = t CSC × PHASE2 + 1

To compensate for phase shifts between clock oscillators of different controllers on the bus, the CAN controller must resynchronize on any relevant signal edge of the current transmission. The resynchronization shortens or lengthens the bit time so that the position of the sample point is shifted with regard to the detected edge. The resynchronization jump width (SJW) defines the maximum of time by which a bit period may be shortened or lengthened by resynchronization.

t SJW = t CSC × SJW + 1
Figure 50-5. CAN Bit Timing

Example of bit timing determination for CAN baudrate of 500 kbit/s:

fPeripheral clock = 48 MHz

CAN baudrate = 500 kbit/s => bit time = 2 μs

Delay of the bus driver: 50 ns

Delay of the receiver: 30 ns

Delay of the bus line (20 m): 110 ns

The total number of time quanta in a bit time must be comprised between 8 and 25. If we fix the bit time to 16 time quanta:

tCSC = 1 time quanta = bit time / 16 = 125 ns

=> BRP = (tCSC x fperipheral clock) - 1 = 5

The propagation segment time is equal to twice the sum of the signal’s propagation time on the bus line, the receiver delay and the output driver delay:

tPRS = 2 * (50+30+110) ns = 380 ns = 3 tCSC

=> PROPAG = tPRS/tCSC - 1 = 2

The remaining time for the two phase segments is:

tPHS1 + tPHS2 = bit time - tCSC - tPRS = (16 - 1 - 3)tCSC

tPHS1 + tPHS2 = 12 tCSC

Because this number is even, we choose tPHS2 = tPHS1 (else we would choose tPHS2 = tPHS1 + tCSC).

tPHS1 = tPHS2 = (12/2) tCSC = 6 tCSC

=> PHASE1 = PHASE2 = tPHS1/tCSC - 1 = 5

The resynchronization jump width must comprise between one tCSC and the minimum of four tCSC and tPHS1. We choose its maximum value:

tSJW = Min(4 tCSC,tPHS1) = 4 tCSC

=> SJW = tSJW/tCSC - 1 = 3

Finally: CAN_BR = 0x00053255