3.12 Restore Default Configuration
The device is initially set with the default configuration provided by Microchip®. To
restore the device to this default state, the users must set the DEVCTRL.SMCFG bit to
'
1'. Upon doing so, the bit will automatically be reset to
'0'. It is imperative for users to verify the integrity of the
configuration by assessing the 16-bit-CRC to ensure that it has been loaded correctly.
Note:
- The existing saved configuration will be cleared.
- The suspended and disabled sensor register values will be cleared immediately, but the measurements will be performed after device reset.
Refer the following manufacturer configuration table for further information.
| Configuration | Bit Pos. | Default Value |
|---|---|---|
| DEVCTRL | 7:0 | 0xD0 |
| 15:8 | 0x07 | |
| MP | 7:0 | 0x1E |
| Reserved | 7:0 | 0x00 |
| LPMP | 7:0 | 0x64 |
| Reserved | 7:0 | 0x00 |
| TIMEOUTCONF | 7:0 | 0x88 |
| 15:8 | 0x13 | |
| REBURSTMODE | 7:0 | 0x01 |
| DI | 7:0 | 0x02 |
| ANTITCHINT | 7:0 | 0x05 |
| MOD | 7:0 | 0x00 |
| DHT | 7:0 | 0x14 |
| TCHDR | 7:0 | 0x14 |
| ANTITCHDR | 7:0 | 0x05 |
| ANTITCHRECALTHRESH | 7:0 | 0x01 |
| NOISETHRESH | 7:0 | 0x0F |
| 15:8 | 0x00 | |
| NOISEINT | 7:0 | 0x03 |
| FREQ-0 | 7:0 | 0x00 |
| FREQ-1 | 7:0 | 0x03 |
| FREQ-2 | 7:0 | 0x07 |
| SENCTRL 0 | 7:0 | 0x01 |
| ... | ||
| SENCTRL 11 | 7:0 | 0x01 |
| SENCTRL 12 | 7:0 | 0x00 |
| ... | ||
| SENCTRL 15 | 7:0 | 0x00 |
| PIN | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| DIR | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| OUT | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| IN | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| LUMPCONF 0 | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| LUMPCONF 1 | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| LUMPCONF 2 | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| LUMPCONF 3 | 7:0 | 0x00 |
| 15:8 | 0x00 | |
| Reserved | 48:0 | 0 |
| THRESHOLD 0 | 7:0 | 0x14 |
| ... | ||
| THRESHOLD 15 | 7:0 | 0x14 |
| FILTERLEVEL 0 | 7:0 | 0x04 |
| ... | ||
| FILTERLEVEL 15 | 7:0 | 0x04 |
| CSD 0 | 7:0 | 0x00 |
| ... | ||
| CSD 15 | 7:0 | 0x00 |
| MCLKFREQ 0 | 7:0 | 0x02 |
| ... | ||
| MCLKFREQ 15 | 7:0 | 0x02 |
| GAIN 0 | 7:0 | 0x00 |
| ... | ||
| GAIN 15 | 7:0 | 0x00 |
| HYSTERESIS 0 | 7:0 | 0x01 |
| ... | ||
| HYSTERESIS 15 | 7:0 | 0x01 |
| AKSGRP 0 | 7:0 | 0x00 |
| ... | ||
| AKSGRP 15 | 7:0 | 0x00 |
| 16-bit CRC (ccitt) | 0x1040 | |
Note:
- The Cyclic Redundancy Check (CRC) values for the mentioned configuration; however, due to the activation of the Autotune and Easy Tune functionalities, modifications will be made to the channel threshold and frequency parameters.
- Refer to the Section 13. Errata before computing the CRC checksum.
