6.5 Data loss (payload) in case storage of a received frame has not completed until end of EOF field is reached
This erratum is applicable only if the MCAN peripheral clock frequency is below 77 MHz.
During frame reception, the Rx Handler needs access to the Message RAM for acceptance filtering (read access) and storage of accepted messages (write access).
The time needed for acceptance filtering and storage of a received message depends on the MCAN peripheral clock frequency, the number of MCANs connected to a single Message RAM, the Message RAM arbitration scheme, and the number of configured filter elements.
- The last write to the Message RAM to complete storage of the received message is omitted, this data is lost. Applies for data frames with DLC > 0, worst case is DLC = 1.
- Rx FIFO: FIFO put index MCAN_RXFnS.FnPI is updated although the last FIFO element holds corrupted data.
- Rx Buffer: New Data flag MCAN_NDATn.NDxx is set although the Rx Buffer holds corrupted data.
- Interrupt flag MCAN_IR.MRAF is not set.
Work around
Reduce the maximum number of configured filter elements for the MCANs attached to the Message RAM until the calculated clock frequency is below the MCAN peripheral clock frequency used with the device.