6.9 Tx FIFO message sequence inversion

Attention: This erratum is applicable for CAN 2.0.
Assume the case that there are two Tx FIFO messages in the output pipeline of the Tx Message Handler. Transmission of Tx FIFO message 1 is started:
  • Position 1: Tx FIFO message 1 (transmission ongoing)
  • Position 2: Tx FIFO message 2
  • Position 3: --
Now a non-Tx FIFO message with a higher CAN priority is requested. Due to its priority it will be inserted into the output pipeline. The TxMH performs so called "message scans" to keep the output pipeline up to date with the highest priority messages from the Message RAM. After the following two message scans, the output pipeline has the following content:
  • Position 1: Tx FIFO message 1 (transmission ongoing)
  • Position 2: non-Tx FIFO message with higher CAN priority
  • Position 3: Tx FIFO message 2
If the transmission of Tx FIFO message 1 is not successful (lost arbitration or CAN bus error) it is pushed from the output pipeline by the non-Tx FIFO message with higher CAN priority. The following scan re-inserts Tx FIFO message 1 into the output pipeline at position 3:
  • Position 1: non-Tx FIFO message with higher CAN priority (transmission ongoing)
  • Position 2: Tx FIFO message 2
  • Position 3: Tx FIFO message 1

Now Tx FIFO message 2 is in the output pipeline in front of Tx FIFO message 1 and they are transmitted in that order, resulting in a message sequence inversion.

Work around

1. First Work Around

Use two dedicated Tx Buffers, e.g. use Tx Buffers 4 and 5 instead of the Tx FIFO. The pseudo-code below replaces the function that fills the Tx FIFO.

Write message to Tx Buffer 4.

Transmit loop:
  • Request Tx Buffer 4 - write MCAN_TXBAR.A4
  • Write message to Tx Buffer 5
  • Wait until transmission of Tx Buffer 4 completed - MCAN_IR.TC, read MCAN_TXBTO.TO4
  • Request Tx Buffer 5 - write MCAN_TXBAR.A5
  • Write message to Tx Buffer 4
  • Wait until transmission of Tx Buffer 5 is completed - MCAN_IR.TC, read MCAN_TXBTO.TO5

2. Second Work Around

Make sure that only one Tx FIFO element is pending for transmission at any time. The Tx FIFO elements may be filled at any time with messages to be transmitted, but their transmission requests are handled separately. Each time a Tx FIFO transmission has completed and the Tx FIFO gets empty (MCAN_IR.TFE = ’1’), the next Tx FIFO element is requested.

3. Third Work Around

Use only a Tx FIFO. Send the message with the higher priority also from Tx FIFO.

One drawback is that the higher priority message has to wait until the preceding messages in the Tx FIFO have been sent.