47.7 Register Summary
Refer to the Registers Description section for more details on register properties and access permissions.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 7:0 | LPMUX | ENABLE | SWRST | |||||
0x01 | Reserved | |||||||||
| 0x02 | STATUS | 7:0 | READY2 | READY1 | READY0 | |||||
0x03 | Reserved | |||||||||
| 0x04 | OPAMPCTRL0 | 31:24 | ||||||||
| 23:16 | MUXNEG[3:0] | MUXPOS[3:0] | ||||||||
| 15:8 | POTMUX[2:0] | RES1MUX[2:0] | RES1EN | RES2OUT | ||||||
| 7:0 | ONDEMAND | RUNSTDBY | RES2VCC | BIAS[1:0] | ANAOUT | ENABLE | ||||
| 0x08 | OPAMPCTRL1 | 31:24 | ||||||||
| 23:16 | MUXNEG[3:0] | MUXPOS[3:0] | ||||||||
| 15:8 | POTMUX[2:0] | RES1MUX[2:0] | RES1EN | RES2OUT | ||||||
| 7:0 | ONDEMAND | RUNSTDBY | RES2VCC | BIAS[1:0] | ANAOUT | ENABLE | ||||
| 0x0C | OPAMPCTRL2 | 31:24 | ||||||||
| 23:16 | MUXNEG[3:0] | MUXPOS[3:0] | ||||||||
| 15:8 | POTMUX[2:0] | RES1MUX[2:0] | RES1EN | RES2OUT | ||||||
| 7:0 | ONDEMAND | RUNSTDBY | RES2VCC | BIAS[1:0] | ANAOUT | ENABLE | ||||
| 0x10 | RESCTRL | 7:0 | REFBUFLEVEL[1:0] | POTMUX[2:0] | RES1MUX | RES1EN | RES2OUT | |||