14.2.3 Secure Application Configuration
This register is loaded from UROW during Boot ROM execution.
Important: if BOCOR.SECCFGLOCK =
0 after exiting the Boot ROM:
- The secure software code of the Flash BOOT region, before passing control on to the secure software code of the Flash APPLICATION region, must lock the IDAU memory security configurations by clearing the IDAU.SECCTRL.SCFGWEN bit.
- Write accesses (W*) are allowed.
Name: | SCFGA |
Offset: | 0x08 |
Reset: | x initially determined from NVM User Row after reset |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
DS[6:4] | |||||||||
Access | R/W* | R/W* | R/W* | ||||||
Reset | x | x | x |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
DS[3:0] | ANSC[8:5] | ||||||||
Access | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | |
Reset | x | x | x | x | x | x | x | x |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
ANSC[4:0] | AS[10:8] | ||||||||
Access | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | |
Reset | x | x | x | x | x | x | x | x |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
AS[7:0] | |||||||||
Access | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | R/W* | |
Reset | x | x | x | x | x | x | x | x |
Bits 26:20 – DS[6:0] Secure Data Flash (DS region) size
This field defines the size of the Secure (S) Data Flash region = DS*0x100 bytes.
Bits 19:11 – ANSC[8:0] Non-Secure Callable (NSC) Flash (ANSC region) size
This field defines the size of the Non-Secure Callable (NSC) Flash APPLICATION region = ANSC*0x20 bytes.
Bits 10:0 – AS[10:0] Secure Flash (AS region) size
This field defines the size of the AS region = AS*0x100 bytes.
The AS region is composed by:
- The Secure (S) Flash APPLICATION region
- The Non-Secure Callable (NSC) Flash APPLICATION region