22.5.4.2 SRAM Automatic Low Power Mode
The SRAM is by default put in Low-Power mode (back-biased) if its power domain is in retention state and the device is in Standby Sleep mode.
This behavior can be changed by configuring BBIASxx bit groups in the Standby Configuration register (STDBYCFG.BBIASxx), refer to the table below for details.
Note: in Standby Sleep mode, the DMAC can
access the SRAM in Standby Sleep mode only when the power domain PDSW is not in retention
and PM.STDBYCFG.BBIASxx=0x0.
| STBYCDFG.BBIASxx config | SRAM | |
|---|---|---|
| 0x0 | Retention Back Biasing mode | SRAM is back-biased if its power domain is in retention state |
| 0x1 | Standby Back Biasing mode | SRAM is back-biased if the device is in Standby Sleep mode |