44.6.7 Sleep Mode Operation
The ADC will continue to operate in any Sleep mode where the selected source clock is running. The ADC’s interrupts, except the OVERRUN interrupt, can be used to wake up the device from Sleep modes. Events connected to the event system can trigger other operations in the system without exiting Sleep modes.
The ONDEMAND and RUNSTDBY bits in the Control A register (CTRLA) control the behavior of the ADC during standby sleep mode, in cases where the ADC is enabled (CTRLA.ENABLE = 1). For further details on available options, refer to Table 44-5.
Note: When CTRLA.ONDEMAND=1, the analog block is powered-off when the conversion is complete.
When a start request is detected, the system returns from sleep and starts a new conversion
after the start-up time delay.
| CTRLA.RUNSTDBY | CTRLA.ONDEMAND | CTRLA.ENABLE | Description |
|---|---|---|---|
| x | x | 0 | Disabled |
| 0 | 0 | 1 | Run in all sleep modes except STANDBY. |
| 0 | 1 | 1 | Run in all sleep modes on request, except STANDBY. |
| 1 | 0 | 1 | Run in all sleep modes. |
| 1 | 1 | 1 | Run in all sleep modes on request. |