33.5.2 Pull-Up and Pull-Down Resistor Control

Each I/O line is designed with an embedded pull-up resistor and an embedded pull-down resistor.

The pull-up resistor on the I/O line(s) defined in PIO_MSKRx can be enabled by setting the PUEN bit in PIO_CFGRx. Clearing the PUEN bit in PIO_CFGRx disables the pull-up resistor of I/O lines defined in PIO_MSKRx.

The pull-down resistor on the I/O line(s) defined in PIwO_MSKRx can be enabled by setting the PDEN bit in PIO_CFGRx. Clearing the PDEN bit in PIO_CFGRx disables the pull-down resistor of I/O lines defined in PIO_MSKRx.

If both PUEN and PDEN are set in PIO_CFGRx, only the pull-up resistor is enabled for the I/O line(s) defined in PIO_MSKRx, and PDEN is discarded.

Control of the pull-up resistor is possible regardless of the configuration of the I/O line (Input, Output, Open Drain).

Note: To program the pull-up or pull-down configuration of a secure I/O line, use S_PIO_MSKRx and S_PIO_CFGRx.

For more details about pull-up and pull-down configuration, see PIO_CFGRx, or S_PIO_CFGRx for a secure I/O line configuration.

The reset value of the PUEN and PDEN of each I/O line is defined at product level and depends on the device multiplexing.