66.19.2 Timing Extraction

Figure 66-30. SSC Transmitter, TK and TF in Output

Figure 66-31. SSC Transmitter, TK in Input and TF in Output

Figure 66-32. SSC Transmitter, TK in Output and TF in Input

Figure 66-33. SSC Transmitter, TK and TF in Input

Figure 66-34. SSC Receiver RK and RF in Input

Figure 66-35. SSC Receiver, RK in Input and RF in Output

Figure 66-36. SSC Receiver, RK and RF in Output

Figure 66-37. SSC Receiver, RK in Output and RF in Input

Table 66-82. SSC0 IOSET1 Timings
Symbol	Power Supply	Conditions	1.8V		3.3V		Unit
Symbol	Parameter	Conditions	Min	Max	Min	Max	Unit
Transmitter
SSC₀	TK edge to TF/TD (TK output, TF output)	–	0	3	0	3.3	ns
SSC₁	TK edge to TF/TD (TK input, TF output)	–	3.7	13	3	11.3	ns
SSC₂	TF setup time before TK edge (TK output)	–	12.8	–	11.2	–	ns
SSC₃	TF hold time after TK edge (TK output)	–	0	–	0	–	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	–	0	3	0	3.3	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	STTDLY = 0 START = 4, 5 or 7	2 × t_CPMCK	3 + (2 × t_CPMCK)	2 × t_CPMCK	3.3 + (2 × t_CPMCK)	ns
SSC₅	TF setup time before TK edge (TK input)	–	0	–	0	–	ns
SSC₆	TF hold time after TK edge (TK input)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₇	TK edge to TF/TD (TK input, TF input)	–	3.7	13	3.2	11.3	ns
SSC₇	TK edge to TF/TD (TK input, TF input)	STTDLY = 0 START = 4, 5 or 7	3.7 + (3 × t_CPMCK)	13 + (3 × t_CPMCK)	3.2 + (3 × t_CPMCK)	11.3 + (3 × t_CPMCK)	ns
Receiver
SSC₈	RF/RD setup time before RK edge (RK input)	–	0	–	0	–	ns
SSC₉	RF/RD hold time after RK edge (RK input)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₀	RK edge to RF (RK input)	–	3.5	12	2.9	10.4	ns
SSC₁₁	RF/RD setup time before RK edge (RK output)	–	13.6 - t_CPMCK	–	12 - t_CPMCK	–	ns
SSC₁₂	RF/RD hold time after RK edge (RK output)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₃	RK edge to RF (RK output)	–	0	3	0	3.3	ns
SSC₁₄⁽¹⁾	TK rise time or fall time	10 to 90%	–	10	–	10	ns
SSC₁₅⁽¹⁾	TK low or high time	V_TK>V_IH or V_TK<V_IL	3.6 + (3 x t_CPMCK)	–	3.4 + (3 x t_CPMCK)	–	ns

Note:

Timings SSC14 and SSC15 also apply when RK is used instead of TK (SSC_TCMR.CKS = RK).

Table 66-83. SSC0 IOSET2 Timings
Symbol	Power supply	Conditions	1.8V		3.3V		Unit
Symbol	Parameter	Conditions	Min	Max	Min	Max	Unit
Transmitter
SSC₀	TK edge to TF/TD (TK output, TF output)	–	0	3.4	0	3.7	ns
SSC₁	TK edge to TF/TD (TK input, TF output)	–	3.5	12.3	2.8	10.5	ns
SSC₂	TF setup time before TK edge (TK output)	–	12	–	10.3	–	ns
SSC₃	TF hold time after TK edge (TK output)	–	0	–	0	–	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	–	0	3.4	0	3.5	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	STTDLY = 0 START = 4, 5 or 7	2 × t_CPMCK	3.4 + (2 × t_CPMCK)	2 × t_CPMCK	3.5 + (2 × t_CPMCK)	ns
SSC₅	TF setup time before TK edge (TK input)	–	0	–	0	–
SSC₆	TF hold time after TK edge (TK input)	–	t_CPMCK	–	t_CPMCK	–
SSC₇	TK edge to TF/TD (TK input, TF input)	–	3.6	12.3	3	10.4
SSC₇	TK edge to TF/TD (TK input, TF input)	STTDLY = 0 START = 4, 5 or 7	3.6 + (3 × t_CPMCK)	12.3 + (3 × t_CPMCK)	3 + (3 × t_CPMCK)	10.4 + (3 × t_CPMCK)
Receiver
SSC₈	RF/RD setup time before RK edge (RK input)	–	0	–	0	–	ns
SSC₉	RF/RD hold time after RK edge (RK input)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₀	RK edge to RF (RK input)	–	3.3	11.5	2.7	9.8	ns
SSC₁₁	RF/RD setup time before RK edge (RK output)	–	13.8 - t_CPMCK	–	12.1 - t_CPMCK	–	ns
SSC₁₂	RF/RD hold time after RK edge (RK output)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₃	RK edge to RF (RK output)	–	0	2.8	0	3.1	ns
SSC₁₄⁽¹⁾	TK rise time or fall time	10 to 90%	–	10	–	10	ns
SSC₁₅⁽¹⁾	TK low or high time	V_TK>V_IH or V_TK<V_IL	3.6 + (3 x t_CPMCK)	–	3.4 + (3 x t_CPMCK)	–	ns

Note:

Timings SSC14 and SSC15 also apply when RK is used instead of TK (SSC_TCMR.CKS = RK).

Table 66-84. SSC1 IOSET1 Timings
Symbol	Power supply	Conditions	1.8V		3.3V		Unit
Symbol	Parameter	Conditions	Min	Max	Min	Max	Unit
Transmitter
SSC₀	TK edge to TF/TD (TK output, TF output)	–	0	2.6	0	2.7	ns
SSC₁	TK edge to TF/TD (TK input, TF output)	–	3.6	12.7	3	10.9	ns
SSC₂	TF setup time before TK edge (TK output)	–	13.4	–	11.2	–	ns
SSC₃	TF hold time after TK edge (TK output)	–	0	–	0	–	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	–	0	2.1	0	2	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	STTDLY = 0 START = 4, 5 or 7	2 × t_CPMCK	2.1 + (2 × t_CPMCK)	2 × t_CPMCK	2 + (2 × t_CPMCK)	ns
SSC₅	TF setup time before TK edge (TK input)	–	0	–	0	–
SSC₆	TF hold time after TK edge (TK input)	–	t_CPMCK	–	t_CPMCK	–
SSC₇	TK edge to TF/TD (TK input, TF input)	–	3.6	12.2	3	10.2
SSC₇	TK edge to TF/TD (TK input, TF input)	STTDLY = 0 START = 4, 5 or 7	3.6 + (3 × t_CPMCK)	12.2 + (3 × t_CPMCK)	3 + (3 × t_CPMCK)	10.2 + (3 × t_CPMCK)
Receiver
SSC₈	RF/RD setup time before RK edge (RK input)	–	0	–	0	–	ns
SSC₉	RF/RD hold time after RK edge (RK input)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₀	RK edge to RF (RK input)	–	3.4	11.8	2.7	9.9	ns
SSC₁₁	RF/RD setup time before RK edge (RK output)	–	12.2 - t_CPMCK	–	10.3 - t_CPMCK	–	ns
SSC₁₂	RF/RD hold time after RK edge (RK output)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₃	RK edge to RF (RK output)	–	0	3.3	0	3.4	ns
SSC₁₄⁽¹⁾	TK rise time or fall time	10 to 90%	–	10	–	10	ns
SSC₁₅⁽¹⁾	TK low or high time	V_TK>V_IH or V_TK<V_IL	3.6 + (3 x t_CPMCK)	–	3.4 + (3 x t_CPMCK)	–	ns

Note:

Timings SSC14 and SSC15 also apply when RK is used instead of TK (SSC_TCMR.CKS = RK).

Table 66-85. SSC1 IOSET2 Timings
Symbol	Power supply	Conditions	1.8V		3.3V		Unit
Symbol	Parameter	Conditions	Min	Max	Min	Max	Unit
Transmitter
SSC₀	TK edge to TF/TD (TK output, TF output)	–	0	2.5	0	2.6	ns
SSC₁	TK edge to TF/TD (TK input, TF output)	–	3.7	13	3.1	11.3	ns
SSC₂	TF setup time before TK edge (TK output)	–	14.3	–	12.2	–	ns
SSC₃	TF hold time after TK edge (TK output)	–	0	–	0	–	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	–	0	2.1	0	1.8	ns
SSC₄	TK edge to TF/TD (TK output, TF input)	STTDLY = 0 START = 4, 5 or 7	2 × t_CPMCK	2.1 + (2 × t_CPMCK)	2 × t_CPMCK	1.8 + (2 × t_CPMCK)	ns
SSC₅	TF setup time before TK edge (TK input)	–	0	–	0	–
SSC₆	TF hold time after TK edge (TK input)	–	t_CPMCK	–	t_CPMCK	–
SSC₇	TK edge to TF/TD (TK input, TF input)	–	3.7	12.6	3.1	10.4
SSC₇	TK edge to TF/TD (TK input, TF input)	STTDLY = 0 START = 4, 5 or 7	3.7 + (3 × t_CPMCK)	12.6 + (3 × t_CPMCK)	3.1 + (3 × t_CPMCK)	10.4 + (3 × t_CPMCK)
Receiver
SSC₈	RF/RD setup time before RK edge (RK input)	–	0	–	0	–	ns
SSC₉	RF/RD hold time after RK edge (RK input)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₀	RK edge to RF (RK input)	–	3.6	12.2	3	10.3	ns
SSC₁₁	RF/RD setup time before RK edge (RK output)	–	12.3 - t_CPMCK	–	10.5 - t_CPMCK	–	ns
SSC₁₂	RF/RD hold time after RK edge (RK output)	–	t_CPMCK	–	t_CPMCK	–	ns
SSC₁₃	RK edge to RF (RK output)	–	0	2.9	0	3.1	ns
SSC₁₄⁽¹⁾	TK rise time or fall time	10 to 90%	–	10	–	10	ns
SSC₁₅⁽¹⁾	TK low or high time	V_TK>V_IH or V_TK<V_IL	3.6 + (3 x t_CPMCK)	–	3.4 + (3 x t_CPMCK)	–	ns

Note:

SAMA5D2 Series