16.5.7.6.3.1 QSPI NOR memories with SFDP (JEDEC JESD216x compliant)

The ROM code reads the memory SFDP tables to learn the factory settings (instruction op code, number of dummy cycles, etc.). The ROM code also reads bits[22:20] in DWORD15 from the Basic Flash Parameter Table (refer to JEDEC JESD216B specification) to select and then execute the relevant procedure, if any, to set the Quad Enable (QE) bit in some internal register of the QSPI NOR memory.

For most memory manufacturers, this QE bit is nonvolatile and must be set before performing any Quad SPI command. This is the only persistent setting that the ROM code may change in the internal registers of the QSPI NOR memory. All other settings are kept unchanged.

Note: Values 001b and 100b for bits[22:20] in DWORD15 are not correctly supported by ROM code rev. C. Consequently, booting from memories using one the above values in their SFDP tables is likely to fail. Almost all Winbond QSPI NOR memories suffer from this issue.

Refer to the datasheet of the QSPI NOR memory to find which value was chosen by the memory manufacturer and written into the SFDP tables.

Finally, the ROM code reads the boot file from the data area of the QSPI NOR memory, and then continues its boot procedure.