4.1 Input/Output Sense Variables
Net names may be traced on the schematic to check circuit connections. MCU pin mapping and peripheral setups are made available through the MCC and MPLAB project.
For more information, refer to the ADC Family Reference Manual (12-Bit High-Speed, Multiple SARs A/D Converter (ADC)) (DS70005213).
| Serial # | Net name | MCU details | Description | Sampling Trigger | Sampling Rate |
|---|---|---|---|---|---|
1 | FB_P_CT_FILT | Dedicated ADC Core 0 | Primary XFR current sensed through CT | Sampled during half of the duty cycle. | Sampled every 100 kHz conversion time: 328 ns |
2 | I_SEC_AVG_FILT | Dedicated ADC Core 1 | Combined output inductor current sensed through shunt | Sampled during half of the duty cycle. | Sampled every 100 kHz, conversion time: 328 ns |
3 | FB_VOUT | Shared Core ADC Ch- 10 | Output voltage | Sampled during half of the duty cycle | Sampled every 100 kHz, conversion time: 470 ns |
4 | VIN_INT_AN | Shared Core ADC Ch- 10 | Input voltage | Free running | Sampled every 100 kHz, conversion time: 900 ns (value available after 900 ns after triggering) |
Hardware gains and offsets of each feedback are listed here. All offsets are calibrated as part of a start-up procedure.
- FB_P_CT_FILT (Primary XFR Current sensed through CT) = 180 mV/A, Offset = 500mV @ 0A
- I_SEC_AVG_FILT (Combined output Inductor Current) = 10 mV/A, Offset = 500mV @ 0A
- FB_VOUT (Output Voltage) = 154 mV/V
- VIN_INT_AN uses digital scaling in firmware