4.3 Digital Compensators (2P2Z & 3P3Z)

The 2-pole/2-zero and 3-pole/3-zero are digital implementations of type II and type III analog compensators. Figure 4-1 shows how a digital compensator may be implemented in the dsPIC33C MCU to control a variable (i.e., VOUT by manipulating the Power Plant stage).

Each step of the Signal, Control and Power stage introduces a phase and gain change. To correctly control the output variable. The entire closed loop should meet the basic requirements for a stable control loop. That is for power supplies’ sufficient gain and phase margin.

The digital compensator must be designed to achieve the proper gain and phase margins by strategically placing poles and zeros in the frequency domain.

A suitable crossover frequency must be decided based on the final application and load transients.