37.2.3.2.1 I3C Pad Compatibility with I²C/SMBus Levels

This I3C module can be used in I²C mode (OPMD = 0b00) until it is assigned a Dynamic Address. However, the module’s operating mode does not automatically switch the SDA/SCL pads to become I²C/SMBus compatible. Depending on the application, the user may choose to select a different input buffer when the module is operating in the I²C mode, which is explained in the "Input Buffers on Pads with MVIO" section of the "MVIO - Multi-Voltage I/O" chapter.

In addition to buffer selection in the pads, the I3CxI2CCON register provides additional settings for I²C/SMBus compatibility of the I3C module. The 50 ns Spike Filters can be enabled on the SDA/SCL lines by setting the FLTEN bit. This selection allows the module to ignore bus traffic at higher I3C speeds. An appropriate SDA Hold Time can also be selected using the SDAHT bits to ensure valid data transfers at various bus speeds and capacitance loads.