37.2.11.1 Target Reset Pattern

The Target Reset Pattern is a special in-band pattern using the SDA and SCL lines that the Controller uses to trigger a Reset action in one or multiple targets. The Target Reset Pattern consists of fourteen SDA transitions while SCL is kept low as shown in Figure 37-50. The pattern ends with a Restart followed by a Stop, which triggers the actual reset action. When the Target detects this pattern on the bus, the RSTDET bit is set and a system level read-only I3CxRIF interrupt flag is also set in the respective PIRx register. Once set, the RSTDET and I3CxRIF bits will not self-clear, the user must clear the RSTDET bit in software to re-arm.
Important:
  1. The RSTDET and I3CxRIF bits will be set whenever the Target Reset Pattern is detected on the bus, regardless of whether the reset action (or inaction) has been configured by the Controller using RSTACT CCC or not.
  2. If the Target Reset Pattern is not preceded by a Start or Restart, then the Bus Free BFREE bit will not set during the Target Reset Pattern, and the following Restart and Stop conditions will not be detected.
Figure 37-50. Target Reset Pattern