Home
2 Drawing a Schematic
Getting started with logic design.
2.1 Components in CLB Synthesizer
Following are the components available in CLB Synthesizer.
2.1.7 Net Labels
Using the same signal in many places in a design.

CLB Synthesizer
The PIC16F13145 family of microcontrollers introduce a new peripheral, the Configurable Logic Block (CLB).
1 Getting Started
Use Cases to hit the ground running with the CLB.
2 Drawing a Schematic
Getting started with logic design.
- 2.1 Components in CLB Synthesizer
  Following are the components available in CLB Synthesizer.
  - 2.1.1 Ports
  - 2.1.2 Logic Gates
    The building blocks of a configurable logic design.
  - 2.1.3 Flip-Flops
    Building blocks for synchronous logic designs.
  - 2.1.4 Multiplexers
    Switching between signals.
  - 2.1.5 Look-up Tables
    Manually configured logic functions.
  - 2.1.6 Constants
    A source of a fixed signal.
  - 2.1.7 Net Labels
    Using the same signal in many places in a design.
- 2.2 Drawing a Basic Schematic
  How to get started with a logic design.
3 Status of the Synthesis Process
Understanding the synthesis status indicator
4 Tips and Tricks
Productivity tips and tricks for the CLB Synthesizer.
5 Interacting with Peripherals and the CPU
How to make connections between the CLB, CPU and other peripheral modules.
6 Storing and Retrieving Logic Designs
The circuit drawings and verilog content of your logic design can be saved to a file in json format
7 Using Hierarchical Modules
Complex logic designs can increase their readability, and be reused by placing logic functions in modules, and then using that module elsewhere in the design.
8 Libraries and Modules
Making a library of modules that can be easily re-used.
9 Advanced Topics
Additional reading for advanced users.
10 Known Issues and Change Log
If you experience unexpected behavior, read the known issues list here.
11 Revision History
Microchip Information

2.1.7 Net Labels

Using the same signal in many places in a design.

A netlabel component dispenses a signal to be used in several places in a logic design, which can increase the readability of a schematic by reducing the number of crossing lines.

For example, then inverted CLBIN1PPS signal is used immediately (connection not shown) and routed to a netlabel SWITCH.

The SWITCH signal can then be used elsewhere in the design as a source.