19.14.3 TMRxCLK

Timer Clock Source Selection Register
Name: TMRxCLK
Offset: 0xFD2,0xFCC,0xFC6

Bit 76543210 
     CS[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 3:0 – CS[3:0] Timer Clock Source Selection bits

Refer to the clock source selection table.

Reset States: 
POR/BOR = 0000
All Other Resets = uuuu