12.5.2 NVMCON2
Note: This register always reads zeros,
regardless of data written.
Refer to the NVM Unlock Sequence section
| Name: | NVMCON2 |
| Offset: | 0xF82 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NVMCON2[7:0] | |||||||||
| Access | WO | WO | WO | WO | WO | WO | WO | WO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Refer to the NVM Unlock Sequence section
| Name: | NVMCON2 |
| Offset: | 0xF82 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NVMCON2[7:0] | |||||||||
| Access | WO | WO | WO | WO | WO | WO | WO | WO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.