6.6.2 CLKRCLK

Clock Reference Clock Selection MUX

Name:	CLKRCLK
Offset:	0xF3F


Bit	7	6	5	4	3	2	1	0
						CLK[2:0]
Access						R/W	R/W	R/W
Reset						0	0	0

Bits 2:0 – CLK[2:0] CLKR Clock Selection bits

Table 6-1. CLKR Clock Sources
CLK	Clock Source
`111`	Reserved
`110`	Reserved
`101`	Reserved
`100`	SOSC
`011`	MFINTOSC (500 kHz)
`010`	LFINTOSC (31 kHz)
`001`	HFINTOSC
`000`	F_OSC

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