3.2.14 Compiled Feature Indicator Bits

Name: FEATURES
Offset: Metrology_Reg_Out[21]
Property: Read

Bit 3130292827262524 
 POLY_PHASESINGLE_PHASE   RCZ_OUT Fs_SAMPLE_RATE 
Access RRRR 
Reset  
Bit 2322212019181716 
  ATSense_LOCNUM_PULSES[1:0]ROGOWSKI_DC_REMOVECAPTURECREEPDFT_ENABLED 
Access RRRRRRR 
Reset  
Bit 15141312111098 
 CORE_CLK_SPEED[3:0]RZC_DETECTPQ_OFFSET_XI_N_MUXINGHALF_COPROC_CLK 
Access RRRRRRRR 
Reset  
Bit 76543210 
        DEBUG_MODES 
Access R 
Reset  

Bit 31 – POLY_PHASE Flag

ValueDescription
1 Compiled: Poly-phase metering enabled.

Bit 30 – SINGLE_PHASE Flag

ValueDescription
1 Compiled: Single-phase metering enabled.

Bit 26 – RCZ_OUT Flag

ValueDescription
1 Compiled: Detect independent V_A raw zero-crossings and output signal on pin PD19
Note: Not compatible with NUM_PULSES = 3

Bit 24 – Fs_SAMPLE_RATE

Metrology baseband sample rate
ValueDescription
0 Baseband sample rate FS = 4000 KHz
1 Baseband sample rate FS = 8000 KHz

Bit 22 – ATSense_LOC

ValueDescription
0 PIC32CXMTSH, Internal ATSense detected (ATsense203)
1 PIC32CXMTC, External ATSense detected (ATSense301)

Bits 21:20 – NUM_PULSES[1:0]

Metrology may be compiled with different number of pulses enabled, [0-3].

NUM_PULSES equals the number of pulses enabled during compile time.

Bit 19 – ROGOWSKI_DC_REMOVE Flag

ValueDescription
1 Compiled for DC-removal before integrator filter when using Rogowski coil current sensors

Bit 18 – CAPTURE Flag

ValueDescription
1 Compiled for waveform capture

Bit 17 – CREEP Flag

ValueDescription
1 Compiled for CREEP thresholding

Bit 16 – DFT_ENABLED Flag

ValueDescription
1 Compiled for DFT harmonic analysis

Bits 15:12 – CORE_CLK_SPEED[3:0]

Core-1 (Metrology core) clock fixed at 237.568 MHz in PIC32CXMTxx metrology
ValueDescription
0x0 Compiled to be used with Core-0 clock = undefined
0x1 Compiled to be used with Core-0 clock = 102.400 MHz
0x2 Compiled to be used with Core-0 clock = 106.496 MHz
0x3 Compiled to be used with Core-0 clock = 110.592 MHz
0x4 Compiled to be used with Core-0 clock = 114.688 MHz
0x5 Compiled to be used with Core-0 clock = 118.784 MHz
0x6 Compiled to be used with Core-0 clock = 237.568 MHz
0x7 Reserved

Bit 11 – RZC_DETECT Flag

ValueDescription
1 Compiled for raw zero-cross detect

Bit 10 – PQ_OFFSET_X Flag

ValueDescription
1 Compiled for use of PQ per-phase offsets

Bit 9 – I_N_MUXING Flag

ValueDescription
1 Compiled for near-full bandwidth I_Neutral metrology

Bit 8 – HALF_COPROC_CLK Flag

ValueDescription
1 Compiled for Core1 coprocessor to run at half speed of Core0

Bit 0 – DEBUG_MODES

ValueDescription
0 Unless specifically compiled for a debug mode, this bit is always = 0
1 Metrology FW compiled in a DEBUG mode