1 General Description of the SPI

The SPI allows high-speed synchronous data transfer between the AVR and peripheral devices or between several AVR devices. On most parts the SPI has a second purpose where it is used for In System Programming (ISP). Refer to the AVR910 application note for details.
Figure 1-1. Master and Slave Interface

The interconnection between two SPI devices always happens between a master device and a slave device. Compared to some peripheral devices like sensors, which can only run in slave mode, the SPI of the AVR can be configured for both master and slave mode. The mode the AVR is running in is specified by the settings of the master bit (MSTR) in the SPI control register (SPCR). Special considerations about the SS pin have to be taken into account. This is described in Multi Slave Systems - SS Pin Functionality.

The master is the active part in this system and has to provide the clock signal a serial data transmission is based on. The slave is not capable of generating the clock signal and thus can not get active on its own. The slave just sends and receives data, if the master generates the necessary clock signal. The master, however, generates the clock signal only while sending data. That means the master has to send data to the slave to read data from the slave.