1.6 SPI Transmission Conflicts

A write collision occurs if the SPDR is written while a transfer is in progress. Since this register is just single buffered in the transmit direction, writing to SPDR causes data to be written directly into the SPI shift register. Because this write operation would corrupt the data of the current transfer, a write-collision error in generated by setting the WCOL bit in the SPSR. The write operation will not be executed in this case and the transfer continues undisturbed.

A write collision is generally a slave error, because a slave has no control over when a master will initiate a transfer. A master - however, knows when a transfer is in progress. Thus, a master should not generate write collision errors, although the SPI logic can detect these errors in a master as well as in a slave mode.