3.4.2.4 Registers Involved In Analog Receive Path
The following registers are used by the analog receive path consisting of LNA, mixer and ADC. See also RF Front-End Register Description.
The RF front-end registers mentioned in the following must not be changed by application software. They are used by firmware to control the power-up and power-down of the receive path.
Register |
Function |
---|---|
FESR.HBSAT |
LNA High-Band saturated |
FESR.LBSAT |
LNA Low-Band saturated |
FEEN1.ADEN |
Analog-to-digital converter enable |
FEEN1.ADCLK |
Analog-to-digital converter clock enable |
FEEN1.LNAEN |
Low-noise amplifier enable |
FEEN2.TMPM |
Temperature measurement enable |
The RF front-end values summarized in the preceding table are transferred from the factory-locked EEPROM to the RF front end by firmware before powering-up the receive path.
Register |
Function |
---|---|
FELNA.LBH[3:0] |
LNA bias High-Band |
FELNA.LBL[3:0] |
LNA bias Low-Band |
FEBT.RTN2[1:0] |
Resistor tuning |
FEBT.CTN2[1:0] |
Capacitor tuning |
The RF front-end registers mentioned in the following table include application-specific settings. For each application, the settings are controlled by EEPROM registers. The configuration tool must be used to calculate these EEPROM settings.
Register |
Function |
---|---|
FECR.ADHS |
Analog-to-digital converter high sample rate |
FECR.S4N3 |
Select 433 MHz not 315 MHz band |
FECR.LBNHB |
Select Low-Band not High-Band |