9.5 Peripheral Dependencies
Peripheral name (1) | Base address | NVIC IRQ Index | AHB/APB Clocks | GCLK Peripheral Channel Index (GCLK.PCHCTRL) | PAC Peripheral Identifier Index (PAC.WRCTRL) | Events (EVSYS) | DMA Trigger Source Index (CHCTRLB.TRIGSRC) | |
---|---|---|---|---|---|---|---|---|
Users(USERm) | Generators (CHANNELn.EVGEN) | |||||||
AHB-APB Bridge A (APBA) Peripherals | ||||||||
PAC | 0x40000000 | 0: ERR | CLK_PAC_AHB Enabled at reset CLK_PAC_APB Enabled at reset | - | 0 Not protected at reset | - | 85: ACCERR | - |
PM | 0x40000400 | 0 | CLK_PM_APB Enabled at reset | - | 1 Not protected at reset | - | - | - |
MCLK | 0x40000800 | 0:CKRDY | CLK_MCLK_APB Enabled at reset | - | 2 Not protected at reset | - | - | - |
RSTC | 0x40000C00 | - | CLK_RSTC_APB Enabled at reset | - | 3 Not protected at reset | - | - | - |
OSCCTRL | 0x40001000 | 0: DPLLLDRTO | CLK_OSCCTRL_APB Enabled at reset | 0:FDPLL96M clk source | 4 Not protected at reset | - | 3: XOSC_FAIL | - |
0: DPLLLTO | 1:FDPLL96M 32kHz | |||||||
0: DPLLLCKF | - | |||||||
0: DPLLLCKR | - | |||||||
0: OSC48MRDY | - | |||||||
0: XOSCFAIL | - | |||||||
0: XOSCRDY | - | |||||||
OSC32KCTRL | 0x40001400 | 0: CKFAIL | CLK_OSC32KCTRL_APB Enabled at reset | - | 5 Not protected at reset | - | 4: XOSC32K_FAIL | - |
0: OSC32KRDY | ||||||||
0: XOSC32KRDY | ||||||||
SUPC | 0x40001800 | 0: BVDDSRDY | CLK_SUPC_APB Enabled at reset | - | 6 Not protected at reset | - | - | - |
0: BODVDDDET | ||||||||
0: BODVDDRDY | ||||||||
GCLK | 0x40001C00 | - | CLK_GCLK_APB Enabled at reset | - | 7 Not protected at reset | - | - | - |
WDT | 0x40002000 | 1: EW | CLK_WDT_APB Enabled at reset | - | 8 Not protected at reset | - | - | - |
RTC | 0x40002400 | 2: CMP0/ALARM0 | CLK_RTC_APB Enabled at reset | - | 9 Not protected at reset | - | 1: RTC_PERD | - |
2: CMP1 | 5: CMP0/ALARM0 | |||||||
2: OVF | 6: CMP1 | |||||||
2: PER0-7 | 7: OVF | |||||||
8:15: PER0-7 | ||||||||
EIC | 0x40002800 | 3, NMI: EXTINT0-15 | CLK_EIC_APB Enabled at reset | 2: GCLK_EIC | 10 Not protected at reset | - | 16-31: EXTINT0-15 | - |
FREQM | 0x40002C00 | 4: DONE | CLK_FREQM_APB Enabled at reset | 3: Measure | 11 Not protected at reset | - | - | - |
4: Reference | ||||||||
MCRAMC | 0x40003000 | 5: DERR, SERR | CLK_MCRAMC_AHB Enabled at reset
CLK_MCRAMC_APB Enabled at reset | - | 12 Not protected at reset | - | - | - |
AHB-APB Bridge B (APBB) Peripherals | ||||||||
PORT | 0x41000000 | - | CLK_PORT_APB Enabled at reset | - | 32 Not protected at reset | 1-4: EV0-3 | - | - |
DSU | 0x41002000 | - | CLK_DSU_AHB Enabled at reset CLK_DSU_APB Enabled at reset | - | 33 Protected at reset | - | - | - |
NVMCTRL | 0x41004000 | 6: FLTCAP, DERR, SERR, ERROR, READY | CLK_NVMCTRL_AHB Enabled at reset
CLK_NVMCTRL_APB Enabled at reset | - | 34 Not protected at reset | - | - | - |
DMAC | 0x41006000 | 7: SUSP, TCMPL, TERR | CLK_DMAC_AHB Enabled at reset | - | 35 Not protected at reset | 5-8: CH0-3 | 32-35: CH0-3 | - |
MTB | 0x41008000 | - | - | - | 36 Not protected at reset | 43: START | - | - |
44: STOP | ||||||||
AHB-APB Bridge C (APBC) Peripherals | ||||||||
EVSYS | 0x42000000 | 8: EVD0-11, OVR0-11 | CLK_EVSYS_APB Disabled at reset | 5-16: one per Channel | 64 Not protected at reset | - | - | - |
SERCOM0 | 0x42000400 | 9 | CLK_SERCOM0_APB Disabled at reset | 17: SLOW (2) | 65 Not protected at reset | - | - | 2: RX |
18: CORE | 3: TX | |||||||
SERCOM1 | 0x42000800 | 10 | CLK_SERCOM1_APB Disabled at reset | 17: SLOW (2) | 66 Not protected at reset | - | - | 4: RX |
19: CORE | 5: TX | |||||||
SERCOM2 | 0x42000C00 | 11 | CLK_SERCOM2_APB Disabled at reset | 17: SLOW (2) | 67 Not protected at reset | - | - | 6: RX |
20: CORE | 7: TX | |||||||
SERCOM3 | 0x42001000 | 12 | CLK_SERCOM3_APB Disabled at reset | 17: SLOW (2) | 68 Not protected at reset | - | - | 8: RX |
21: CORE | 9: TX | |||||||
SERCOM4 | 0x42001400 | 13 | CLK_SERCOM4_APB Disabled at reset | 17: SLOW (2) | 69 Not protected at reset | - | - | 10: RX |
22: CORE | 11: TX | |||||||
SERCOM5 | 0x42001800 | 14 | CLK_SERCOM5_APB Disabled at reset | 17: SLOW (2) | 70 Not protected at reset | - | - | 12: RX |
23: CORE | 13: TX | |||||||
CAN0 | 0x42001C00 | 15 | CLK_CAN0_AHB Enabled at reset | 26 | 71 Not protected at reset | - | - | 14: DEBUG |
CAN1 | 0x42002000 | 16 | CLK_CAN1_AHB Enabled at reset | 27 | 72 Not protected at reset | - | - | 15: DEBUG |
TCC0 | 0x42002400 | 17: OVF | CLK_TCC0_APB Disabled at reset | 28 | 73 Not protected at reset | 9-10: EV0-1 | 36: OVF | 16: OVF |
17: TRG | 11-14: MC0-3 | 37: TRG | 17-20: MC0-3 | |||||
17: CNT | - | 38: CNT | - | |||||
17: ERR | - | 39-42: MC0-3 | - | |||||
17: UFS | - | - | - | |||||
17: DFS | - | - | - | |||||
17: FAULTA-B | - | - | - | |||||
17: FAULT0-1 | - | - | - | |||||
17: MC0-3 | - | - | - | |||||
TCC1 | 0x42002800 | 18: OVF | CLK_TCC1_APB Disabled at reset | 28 | 74 Not protected at reset | 15-16: EV0-1 | 43: OVF | 21: OVF |
18: TRG | 17-18: MC0-1 | 44: TRG | 22-23: MC0-1 | |||||
18: CNT | - | 45: CNT | - | |||||
18: ERR | - | 46-47: MC0-1 | - | |||||
18: UFS | - | - | - | |||||
18: DFS | - | - | - | |||||
18: FAULTA-B | - | - | - | |||||
18: FAULT0-1 | - | - | - | |||||
18: MC0-1 | - | - | - | |||||
TCC2 | 0x42002C00 | 19: OVF | CLK_TCC2_APB Disabled at reset | 29 | 75 Not protected at reset | 19-20: EV0-1 | 48: OVF | 24: OVF |
19: TRG | 21-22: MC0-1 | 49: TRG | 25-26: MC0-1 | |||||
19: CNT | - | 50: CNT | - | |||||
19: ERR | - | 51-52: MC0-1 | - | |||||
19: UFS | - | - | - | |||||
19: DFS | - | - | - | |||||
19: FAULTA-B | - | - | - | |||||
19: FAULT0-1 | - | - | - | |||||
19: MC0-1 | - | - | - | |||||
TC0 | 0x42003000 | 20: OVF | CLK_TC0_APB Disabled at reset | 30 | 76 Not protected at reset | 23: EVU | 53: OVF | 27: OVF |
20: MC0-1 | 54-55: MC0-1 | 28-29: MC0-1 | ||||||
20: ERR | - | - | ||||||
TC1 | 0x42003400 | 21: OVF | CLK_TC1_APB Disabled at reset | 30 | 77 Not protected at reset | 24: EVU | 56: OVF | 30: OVF |
21: MC0-1 | 57-58: MC0-1 | 31-32: MC0-1 | ||||||
21: ERR | - | - | ||||||
TC2 | 0x42003800 | 22: OVF | CLK_TC2_APB Disabled at reset | 31 | 78 Not protected at reset | 25: EVU | 59: OVF | 33: OVF |
22: MC0-1 | 60-61: MC0-1 | 34-35: MC0-1 | ||||||
22: ERR | - | - | ||||||
TC3 | 0x42003C00 | 23: OVF | CLK_TC3_APB Disabled at reset | 31 | 79 Not protected at reset | 26: EVU | 62: OVF | 36: OVF |
23: MC0-1 | 63-64: MC0-1 | 37-38: MC0-1 | ||||||
23: ERR | - | - | ||||||
TC4 | 0x42004000 | 24: OVF | CLK_TC4_APB Disabled at reset | 32 | 80 Not protected at reset | 27: EVU | 65: OVF | 39: OVF |
24: MC0-1 | 66-67: MC0-1 | 40-41: MC0-1 | ||||||
24: ERR | - | - | ||||||
ADC0 | 0x42004400 | 25: RESRDY | CLK_ADC0_APB Disabled at reset | 36 | 81 Not protected at reset | 28: START | 68: RESRDY | 42: RESRDY |
25: WINMON | 29: SYNC | 69: WINMON | ||||||
25: OVERRUN | - | - | ||||||
ADC1 | 0x42004800 | 26: RESRDY | CLK_ADC1_APB | 37 | 82 Not protected at reset | 30: START | 70: RESRDY | 43: RESRDY |
26: WINMON | 31: SYNC | 71: WINMON | ||||||
26: OVERRUN | - | - | ||||||
AC | 0x42004C00 | 27: COMP0-3 | CLK_AC_APB Disabled at reset | 42 | 83 Not protected at reset | 32-35: SOC0-3 | 72-75: COMP0-3 | - |
27: WIN0-1 | 76-77: WIN0-1 | |||||||
DAC | 0x42005000 | 28: EMPTY, UNDERRUN | CLK_DAC_APB Disabled at reset | 38 | 84 Not protected at reset | 36: START | 78: EMPTY | 45: EMPTY |
PTC | 0x42005400 | 30: EOC | CLK_PTC_APB Disabled at reset | 39 | 85 Not protected at reset | 37:STCONV | 79: EOC | 46: EOC |
30: WCOMP | 80: WCOMP | 47: WCOMP | ||||||
- | - | 48: SEQ | ||||||
CCL | 0x42005800 | - | CLK_CCL_APB Disabled at reset | 40 | 86 Not protected at reset | 38-41: LUTIN0-3 | 81-84: LUTOUT0-3 | - |
ICM | 0x42006400 | 31: RSU, REC, RWC, RBE, RMD, RHC | CLK_ICM_AHB Enabled at reset CLK_ICM_APB Disabled at reset | - | 89 Not protected at reset | - | - | - |
PDEC | 0x42006800 | 29: OVF | CLK_PDEC_APB Disabled at reset | 41 | 90 Not protected at reset | - | 96: OVF | - |
29: ERR | 48: EVU0 | 97: ERR | ||||||
29: DIR | 49: EVU1 | 98: DIR | ||||||
29: VLC | 50: EVU2 | 99: VLC | ||||||
29: MC0 | - | 100: MC0 | ||||||
29: MC1 | - | 101: MC1 | ||||||
SMBIST | 0x42006C00 | - | CLK_SMBIST_APB Enabled at reset | - | 91 Protected at reset | - | - | - |
AHB-APB Bridge D (APBD) Peripherals | ||||||||
SERCOM6 | 0x43000000 | 9 | CLK_SERCOM6_APB Disabled at reset | 17: SLOW (1) | 96 Not protected at reset | - | - | 49: RX |
24: CORE | 50: TX | |||||||
SERCOM7 | 0x43000400 | 10 | CLK_SERCOM7_APB Disabled at reset | 17: SLOW (1) | 97 Not protected at reset | - | - | 51: RX |
25: CORE | 52: TX | |||||||
TC5 | 0x43000800 | 20: OVF | CLK_TC5_APB Disabled at reset | 33 | 98 Not protected at reset | 45: EVU | 87: OVF | 53: OVF |
20: MC0-1 | 88-89: MC0-1 | 54-55: MC0-1 | ||||||
20: ERR | - | - | ||||||
TC6 | 0x43000C00 | 21: OVF | CLK_TC6_APB Disabled at reset | 34 | 99 Not protected at reset | 46: EVU | 90: OVF | 56: OVF |
21: MC0-1 | 91-92: MC0-1 | 57-58: MC0-1 | ||||||
21: ERR | - | - | ||||||
TC7 | 0x43001000 | 22: OVF | CLK_TC7_APB Disabled at reset | 35 | 100 Not protected at reset | 47: EVU | 93: OVF | 59: OVF |
22: MC0-1 | 94-95: MC0-1 | 60-61: MC0-1 | ||||||
22: ERR | - | - | ||||||
AHB Peripherals | ||||||||
DIVAS | 0x48000000 | - | CLK_DIVAS_AHB Enabled at reset
CLK_DIVAS_APB Enabled at reset | - | - | - | - | - |
IOBUS Peripherals | ||||||||
PORT | 0x60000000 | 31 | CLK_PORT_APB Enabled at reset | - | 32 Not protected at reset | 1-4: EV0-3 | - | - |
DIVAS | 0x60000200 | - | CLK_DIVAS_AHB Enabled at reset CLK_DIVAS_APB Enabled at reset | - | - | - | - | - |
Note:
- Refer to the Configuration Summary chapter for the list of peripherals and peripheral instances present in each variant.
- GCLK_SERCOMx_SLOW is only used by SERCOM I²C.