51 Revision History

Revision F - July 2023

No content changes compared with previous revision.

Revision E - February 2023

The following table represents the changes implemented in this revision.

Section Changes
Introduction
  • Updated specifications for Analog, Memories, System, Security, and the PWM
Configuration Summary
Ordering Information
  • Updated with a new diagram
Block Diagram
  • Updated with a new diagram
Pinout and Packaging
Signal Description
Device Start-Up
Product Mapping
  • Updated with a new diagram and a new note
Peripherals
Memories
Processor and Architecture
PAC
  • Added a new note to the PERID bit field of the WRCTRL register
DSU
  • Updated the Table in the DEVSEL bit field, and added a new die number to the DIE bi tfield of the DID register
GCLK
DMAC
NVMCTRL
EVSYS
SERCOM
CAN
ADC
AC
  • Clarified numbers of pins and comparators, and added hyperlinks to Overview
  • Specified “Up to four” Comparators in Features
Packaging Information

Revision D - December 2022

The following table represents the changes implemented in this revision.

Section Changes
Introduction
  • Added Qualification specifications
NVMCTRL
SERCOM SPI
Electrical Characteristics at 85°C
Electrical Characteristics at 125°C
Schematic Checklist

Revision C - July 2022

The following table represents the changes implemented in this revision.

Section Changes
General
Block Diagram
Pinout and Packaging
Power Supplies
  • Added text to the bullet for low-Power mode
PAC
  • Updated naming for the control key for the KEY bitfield in the WRCTRL Register
OSCCTRL
RTC
  • Updated the CLOCK Register in Clock/Calendar Mode with new properties and notes
TC
  • Updated the COUNT Register in 8-bit Mode with a new property and notes
  • Updated the CCx Register in 8-bit Mode with a new property
  • Updated the COUNT Register in 16-bit Mode with a new property and notes
  • Updated the COUNT Register in 32-bit Mode with a new property and notes
TCC
DAC
AC
ICM
  • Updated the table for the URAT bitfield in the UASR Register
Electrical Characteristics at 85°C
Electrical Characteristics at 125°C

Revision B - February 2022

Numerous typographical corrections were implemented in this revision across the entire document.

The following table represents the changes implemented in this revision.

Section Changes
Introduction Updated the Memories listing to remove references to 4, 16, and 128 KB
Ordering Information Updated Memory size to remove 1216
Block Diagram Updated the Flash, Data Flash and SRAM blocks to remove the references to 4, 16, and 128 KB
Memories Updated the Table 10-1 with the removal of the column for PIC32CM1216
GCLK
MCLK
OSCCTRL
OSC32KCTRL
PM
SUPC
RSTC
PAC
DSU
DIVAS
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies and Moved Register access Protection, and CPU Local Bus to the Functional Description
  • Renamed Power Management to Sleep Mode Controller and moved it under the Functional Description section
  • Added new text to the Initialization topic
  • Added a note to the following registers:
WDT
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Renamed Power Management to Sleep Mode Controller and moved it under the Functional Description section
  • Moved Clocks and Debug Operation under the Functional description section
RTC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional description section
DMAC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional description section
  • Added new text to the beginning of the Initialization topic
EIC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation and Clocks under the Functional description section
  • Added new descriptions in parenthesis to Principle of Operation
  • Updated the text of Sleep Mode Operation
  • Added bit names to Synchronization
NVMCTRL
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation and Clocks under the Functional description section
  • Renamed Power Management to Sleep Mode Controller and moved it under the Functional Description
  • Added new text to the beginning of the Initialization topic
PORT
  • Added new paragraphs to Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Renamed Power Management to Sleep Mode Controller and moved it under the Functional Description
  • Moved Debug Operation under the Functional description section
EVSYS
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional description section
  • Renamed Power Management to Sleep Mode Controller and moved it under the Functional Description
  • Added new text to the beginning of the Initialization topic
SERCOM
  • Added new paragraphs to Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
SERCOM USART
  • Added I/O content to the Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
SERCOM SPI
  • Added I/O content to the Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
SERCOM I2C
  • Added I/O content to the Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
CAN
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed or updated the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
TC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
TCC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
CCL
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
  • Updated Sleep Mode operation with a new first paragraph
ADC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
  • Updated Sleep Mode operation with a new first paragraph
AC
  • Moved I/O information into the Signal Description
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional description section
  • Updated Sleep Mode operation with a new first paragraph
DAC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new text to the beginning of the Initialization topic
  • Moved Debug Operation under the Functional Description section
  • Updated Sleep Mode operation with a new first paragraph
PTC
  • Moved I/O information into the Signal Description
  • Moved information on Self Capacitance and Mutual Capacitance to the Block Diagram
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
FREQM
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional Description section
  • Added new text to the beginning of the Initialization topic
PDEC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional Description section
  • Added new text to the beginning of the Initialization topic
ICM
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Added new sub chapter, Sleep Mode Operation
SMBIST
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional Description section
  • Added new text to the beginning of the Initialization topic
  • Added new sub chapters; Basic Operation and Sleep Mode Operation
MCRAMC
  • Renamed Product Dependencies to Peripheral Dependencies and added a new table
  • Removed the subtopics to Peripheral Dependencies
  • Moved Debug Operation under the Functional Description section
  • Updated the following registers to properly display a note:
    • FLTPTR
    • FLTADR
Electrical Characteristics Updated the following sections with new information for min, typ and max specs, along with new notes, and updated diagrams:
Electrical Characteristics at 125°C New chapter added for this revision.
Packaging Updated the packaging images for the 64-pin VQFN
Schematic Checklist Added the following sections:

Revision A - June 2020

This is the initial released version of this document.