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32-bit Arm Cortex-M0+ with 5V Support MCU

PIC32CM2532JH00032 PIC32CM2532JH00048 PIC32CM2532JH00064 PIC32CM2532JH00100 PIC32CM2532JH01032 PIC32CM2532JH01048 PIC32CM2532JH01064 PIC32CM2532JH01100 PIC32CM5164JH00032 PIC32CM5164JH00048 PIC32CM5164JH00064 PIC32CM5164JH00100 PIC32CM5164JH01032 PIC32CM5164JH01048 PIC32CM5164JH01064 PIC32CM5164JH01100

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11 Processor and Architecture
11.1 Cortex M0+ Processor
11.1.4 I/O Interface

512-KB Flash, 64-KB SRAM with CAN-FD, Enhanced PTC and Advanced Analog
1 Configuration Summary
2 Ordering Information
3 Block Diagram
4 Pinout and Packaging
5 Signal Descriptions List
6 Power Supplies
7 Device Start-Up
8 Product Mapping
9 Peripherals
10 Memories
11 Processor and Architecture
12 Peripheral Access Controller (PAC)
13 Device Service Unit (DSU)
14 Generic Clock Controller (GCLK)
15 Main Clock (MCLK)
16 32.768 kHz Oscillators Controller (OSC32KCTRL)
17 Oscillators Controller (OSCCTRL)
18 Supply Controller (SUPC)
19 Power Manager (PM)
20 Reset Controller (RSTC)
21 Divide and Square Root Accelerator (DIVAS)
22 Watchdog Timer (WDT)
23 Real-Time Counter (RTC)
24 Direct Memory Access Controller (DMAC)
25 External Interrupt Controller (EIC)
26 Non-volatile Memory Controller (NVMCTRL)
27 I/O Pin Controller (PORT)
28 Event System (EVSYS)
29 Serial Communication Interface (SERCOM)
30 SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
31 SERCOM Serial Peripheral Interface (SERCOM SPI)
32 SERCOM Inter-Integrated Circuit (SERCOM I²C)
33 Control Area Network (CAN)
34 Timer/Counter (TC)
35 Timer Counter for Control Applications (TCC)
36 Configurable Custom Logic (CCL)
37 Analog-to-Digital Converter (ADC)
38 Analog Comparators (AC)
39 Digital-to-Analog Converter (DAC)
40 Peripheral Touch Controller (PTC)
41 Frequency Meter (FREQM)
42 Position Decoder (PDEC)
43 Integrity Check Monitor (ICM)
44 SRAM Memory Built-In Self-Test Module (SMBIST)
45 SRAM Controller (MCRAMC)
46 Electrical Characteristics at 85°C
47 Electrical Characteristics at 125°C
48 Packaging Information
49 Schematic Checklist
50 Appendix
51 Revision History
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11.1.4 I/O Interface

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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