4.6 ACSRB – Analog Comparator Control and Status Register
| Name: | ACSRB |
| Offset: | 0x4F |
| Reset: | 0x00 |
| Property: | When addressing as I/O Register: address offset is 0x2F |
The Store Program Memory Control and Status Register contains the control bits needed to control the Boot Loader operations. When addressing I/O Registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACOE | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
Bit 0 – ACOE Analog Comparator Output Enable
Setting this bit makes the output of AC available on PE0. If this bit is not set, PE0 can be used as general I/O pin.