8.3 In-System Reprogrammable Flash Program Memory

The AVR32LA14/20/28/32 contains 32 KB on-chip, in-system reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized with a 16-bit data width. For write protection, the Flash program memory space can be divided into three sections: The Boot Loader (BOOT) section, the Application Code (APPCODE) section, and the Application Data (APPDATA) section. Code placed in one section may be restricted from writing to addresses in other sections. See the NVMCTRL - Nonvolatile Memory Controller chapter for more details.

The Program Counter (PC) can address the whole program memory. The procedure for writing Flash memory is described in detail in the NVMCTRL chapter.

The Flash memory is mapped into the data space and is accessible with ordinary LD/ST instructions. See the NVMCTRL section for details on which Flash section is mapped into the data space. For LD/ST instructions, Flash is mapped from address 0x8000. The Flash memory can also be read with the LPM instruction; for LPM, the Flash start address is 0x0000.

The AVR32LA14/20/28/32 has a CRC module hosted on the data bus.

The table and figure below show the mapping of the physical and logical memory sections.
  • NRWW = No-Read-While-Write
  • RWW = Read-While-Write
See the NVMCTRL - Nonvolatile Memory Controller chapter for more details about the different physical and logical memory sections and their configuration.
Table 8-1. Physical Properties of Flash Memory
Property

AVR32LA32
                  AVR32LA28
                  AVR32LA20
AVR32LA14

Size32 KB
NRWW size4 KB
RWW size28 KB
Page size64B
Number of pages512
Start address in data space0x8000
Start address in code space0x0000
Note: The NRWW section always starts at the start address of the Flash memory.

Figure 8-2. Flash Sections