4 Layout Consideration
(Ask a Question)The number of layers depend on the number of signals routed from the package.
In Microchip's FPGA devices, the signal pins constitute about 55–65% of the total pins in the package. The number of layers increases linearly with the number of signal pins to be routed. In applications with space constraints, the trace width can be narrowed down to route multiple traces between two pads/vias.
Important: Though this approach accommodates more traces in the BGA area, it causes
impedance discontinuity in that region and increases crosstalk between the signals.
Tip: Microchip recommends contacting
the signal integrity engineers if a narrowing down approach is followed.