3.3.5.14.5 Fast Frequency Change

The UDDRC supports Fast Frequency Change, using two sets of timing registers. The alternative set of timing registers can be found in UDDRC_REGS_FREQ1 registers. These registers may be written while the traffic is in progress using the first set of timing registers, thus reducing the software overhead at the time of frequency change.

The Fast Frequency Change sequence is described in Changing Clock Frequencies.