7.6.7.12 PDMC Fault Status Register
When PDMC_WPSR.NCE > 0 and all PDMC_FSR flags read zero, there is no need to reconfigure the PDMC.
| Name: | PDMC_FSR |
| Offset: | 0x3C |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| WPMRNCF | IMRNCF | CFGNCF | MRNCF | ||||||
| Access | R | R | R | R | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | |||||||||
| Reset |
Bit 11 – WPMRNCF Write Protection Mode Register Non-Corrected Fault Status
| Value | Description |
|---|---|
| 0 | No fault in PDMC_WPMR |
| 1 | An error is detected in PDMC_WPMR. To correct the fault, write accesses must be performed in PDMC_WPMR with the correct value. |
Bit 10 – IMRNCF User Data Registers Non-Corrected Fault Status
| Value | Description |
|---|---|
| 0 | No fault in PDMC_IMR |
| 1 | An error is detected in PDMC_IMR. To correct the fault, a write access must be performed in PDMC_IDR to clear all the sources of interrupts and a write access must be performed in the PDMC_IER to reload the correct value for the enabled sources of interrupt. |
Bit 9 – CFGNCF Configuration Register Non-Corrected Fault Status
| Value | Description |
|---|---|
| 0 | No fault in PDMC_CFGR |
| 1 | An error is detected in PDMC_CFGR. To correct the fault, a write access must be performed in PDMC_CFGR with the correct value. |
Bit 8 – MRNCF Mode Registers Non-Corrected Fault Status
| Value | Description |
|---|---|
| 0 | No fault in PDMC_MR |
| 1 | An error is detected in PDMC_MR. To correct the fault, a write access must be performed in PDMC_MR with the correct value. |