25.10.6 Tamper Control
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | TAMPCTRL |
| Offset: | 0x60 |
| Reset: | 0x00000000 |
| Property: | RW |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| DEBNC[7:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TAMLVL[7:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| IN7ACT[1:0] | IN6ACT[1:0] | IN5ACT[1:0] | IN4ACT[1:0] | ||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| IN3ACT[1:0] | IN2ACT[1:0] | IN1ACT[1:0] | IN0ACT[1:0] | ||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:24 – DEBNC[7:0] Debouncer Enable x
Bits 23:16 – TAMLVL[7:0] Tamper Level Select x
Bits 15:14 – IN7ACT[1:0] Tamper Input 7 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN7 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 13:12 – IN6ACT[1:0] Tamper Input 6 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN6 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 11:10 – IN5ACT[1:0] Tamper Input 5 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN5 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 9:8 – IN4ACT[1:0] Tamper Input 4 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN4 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 7:6 – IN3ACT[1:0] Tamper Input 3 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN3 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 5:4 – IN2ACT[1:0] Tamper Input 2 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN2 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 3:2 – IN1ACT[1:0] Tamper Input 1 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN1 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |
Bits 1:0 – IN0ACT[1:0] Tamper Input 0 Action
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | Off (Disabled) |
| 0x1 | WAKE | Wake and set Tamper flag |
| 0x2 | CAPTURE | Capture timestamp and set Tamper flag |
| 0x3 | ACTL | Compare IN0 to OUT. When a mismatch occurs, capture timestamp and set Tamper flag |