17.5.2.3 Debugger Probe Detection Conditions and Effects

Once the debugger is attached, the DSU takes ownership of the JTAG port pins to prevent application code from reclaiming them. If the debugger switches to SWD mode using the ARM JTAG to SWD switching sequence, the unused JTAG IOs are released, claiming the SWCLK and SWDIO IOs only. Once in SWD mode, the debugger can switch back to JTAG mode using the Arm SWD to JTAG switching sequence at which point the hardware will claim all the JTAG IOs again.

The DP starts in JTAG mode after a power-reset.

Following a debugger detection:

• The Debugger Present bit of the Status B register (STATUSB.DBGPRES) reads one
• The CPU reset gets extended (only with cold-plugging)