42.7.5 Recoverable Fault A Configuration

Table 42-10. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	FCTRLA
Offset:	0x0C
Reset:	0x00000000
Property:	PAC Write-Protection, Enable-Protected


Bit	31	30	29	28	27	26	25	24
					FILTERVAL[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0


Bit	23	22	21	20	19	18	17	16
	BLANKVAL[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	BLANKPRESC	CAPTURE[2:0]			CHSEL[1:0]		HALT[1:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	RESTART	BLANK[1:0]		QUAL	KEEP		SRC[1:0]
Access	R/W	R/W	R/W	R/W	R/W		R/W	R/W
Reset	0	0	0	0	0		0	0

Bits 27:24 – FILTERVAL[3:0] Fault A Filter Value

These bits define the filter value applied on the Fault A (MCE0) event input line. Input signal with pulse width shorter than (FILTERVAL) * GCLK_TCCx is filtered. An Input signal with pulse width larger than (FILTERVAL+1) * GCLK_TCCx is passed to the TCC. The value must be set to zero when this event is used as synchronous event.

Bits 23:16 – BLANKVAL[7:0] Fault A Blanking Time

These bits determine the duration of the blanking of the fault input source. Activation and edge selection of the blank filtering are done by the BLANK bits (FCTRLA.BLANK).

When enabled, the fault input source is internally disabled for BLANKVAL* prescaled GCLK_TCCx periods after the detection of the waveform edge.

Bit 15 – BLANKPRESC Fault A Blanking Prescaler

This bit enables a factor 64 prescaler factor on used as base frequency of the BLANKVAL value.

Value	Description
0	Blank time is BLANKVAL* prescaled GCLK_TCCx.
1	Blank time is BLANKVAL* 64 * prescaled GCLK_TCCx.

Bits 14:12 – CAPTURE[2:0] Fault A Capture Action

These bits select the capture and Fault A interrupt/event conditions.

Table 42-11. Fault A Capture Action
Value	Name	Description
0x0	DISABLE	Capture on valid recoverable Fault A is disabled
0x1	CAPT	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) . INTFLAG.FAULTA (INTFLAG<12>) flag rises on each new captured value.
0x2	CAPTMIN	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) , if COUNT value is lower than the last stored capture value (CC). INTFLAG.FAULTA (INTFLAG<12>) flag rises on each local minimum detection.
0x3	CAPTMAX	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) , if COUNT value is higher than the last stored capture value (CC). INTFLAG.FAULTA (INTFLAG<12>)flag rises on each local maximum detection.
0x4	LOCMIN	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) . INTFLAG.FAULTA (INTFLAG<12>) flag rises on each local minimum value detection.
0x5	LOCMAX	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) . INTFLAG.FAULTA (INTFLAG<12>) flag rises on each local maximum detection.
0x6	DERIV0	On rising edge of a valid recoverable Fault A, capture counter value on channel selected by FCTRLA.CHSEL bits (FCTRLA <11:10>) . INTFLAG.FAULTA (INTFLAG<12>) flag rises on each local maximum or minimum detection.
0x7	CAPTMARK	Capture with Ramp index as MSB value.

Value	Name	Description
0	DISABLE	No capture
1	CAPT	Capture on fault
2	CAPTMIN	Minimum capture
3	CAPTMAX	Maximum capture
4	LOCMIN	Minimum local detection
5	LOCMAX	Maximum local detection
6	DERIV0	Minimum and maximum local detection
7	CAPTMARK	Capture with ramp index as MSB value

Bits 11:10 – CHSEL[1:0] Fault A Capture Channel

These bits select the channel for capture operation triggered by recoverable Fault A.

Value	Name	Description
0	CC0	Capture value stored in channel 0
1	CC1	Capture value stored in channel 1
2	CC2	Capture value stored in channel 2
3	CC3	Capture value stored in channel 3

Bits 9:8 – HALT[1:0] Fault A Halt Mode

These bits select the halt action for recoverable Fault A.

Value	Name	Description
0	DISABLE	Halt action disabled
1	HW	Hardware halt action
2	SW	Software halt action
3	NR	Non-recoverable fault

Bit 7 – RESTART Fault A Restart

Setting this bit enables restart action for Fault A.

Value	Description
0	Fault A restart action is disabled.
1	Fault A restart action is enabled.

Bits 6:5 – BLANK[1:0] Fault A Blanking Mode

These bits, select the blanking start point for recoverable Fault A.

Value	Name	Description
0	START	Blanking applied from start of the ramp
1	RISE	Blanking applied from rising edge of the output waveform
2	FALL	Blanking applied from falling edge of the output waveform
3	BOTH	Blanking applied from each toggle of the output waveform

Bit 4 – QUAL Fault A Qualification

Setting this bit enables the recoverable Fault A input qualification.

Value	Description
0	The recoverable Fault A input is not disabled on CMPy value condition.
1	The recoverable Fault A input is disabled when channel output is at inactive level (CMPy = 0).

Bit 3 – KEEP Fault A Keeper

Setting this bit enables the Fault A keep action.

Value	Description
0	The Fault A state is released as soon as the recoverable Fault A is released.
1	The Fault A state is released at the end of TCC cycle.

Bits 1:0 – SRC[1:0] Fault A Source

These bits select the TCC Fault A mode.

Event system channel connected to Match or Capture Channel 0 (MCE0) event input, must be configured to route the event asynchronously, when used as a recoverable Fault A input.

Value	Name	Description
0	DISABLE	Fault input disabled
1	ENABLE	MCEx (x=0,1) event input
2	INVERT	Inverted MCEx (x=0,1) event input
3	ALTFAULT	Alternate fault (A or B) state at the end of the previous period