7.7.17 PIR6
PIR6 Peripheral Interrupt Request (Flag) Register 6
Note: Interrupt flag bits are set when an Interrupt condition occurs,
regardless of the state of its corresponding enable bit or the
Global Enable bit. User software must ensure the appropriate
interrupt flag bits are clear prior to enabling an interrupt. This
feature allows for software polling.
Name: | PIR6 |
Offset: | 0x712 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CCP4IF | CCP3IF | CCP2IF | CCP1IF | ||||||
Access | R/W/HS | R/W/HS | R/W/HS | R/W/HS | |||||
Reset | 0 | 0 | 0 | 0 |
Bit 3 – CCP4IF CCP4 Interrupt Flag bit
Value | Name | Description |
---|---|---|
1 |
Capture mode | Capture occurred (must be cleared in software) |
0 |
Capture mode | Capture did not occur |
1 |
Compare mode | Compare match occurred (must be cleared in software) |
0 |
Compare mode | Compare match did not occur |
1 |
PWM mode | Output trailing edge occurred (must be cleared in software) |
0 |
PWM mode | Output trailing edge did not occur |
Bit 2 – CCP3IF CCP3 Interrupt Flag bit
Value | Name | Description |
---|---|---|
1 |
Capture mode | Capture occurred (must be cleared in software) |
0 |
Capture mode | Capture did not occur |
1 |
Compare mode | Compare match occurred (must be cleared in software) |
0 |
Compare mode | Compare match did not occur |
1 |
PWM mode | Output trailing edge occurred (must be cleared in software) |
0 |
PWM mode | Output trailing edge did not occur |
Bit 1 – CCP2IF CCP2 Interrupt Flag bit
Value | Name | Description |
---|---|---|
1 |
Capture mode | Capture occurred (must be cleared in software) |
0 |
Capture mode | Capture did not occur |
1 |
Compare mode | Compare match occurred (must be cleared in software) |
0 |
Compare mode | Compare match did not occur |
1 |
PWM mode | Output trailing edge occurred (must be cleared in software) |
0 |
PWM mode | Output trailing edge did not occur |
Bit 0 – CCP1IF CCP1 Interrupt Flag bit
Value | Name | Description |
---|---|---|
1 |
Capture mode | Capture occurred (must be cleared in software) |
0 |
Capture mode | Capture did not occur |
1 |
Compare mode | Compare match occurred (must be cleared in software) |
0 |
Compare mode | Compare match did not occur |
1 |
PWM mode | Output trailing edge occurred (must be cleared in software) |
0 |
PWM mode | Output trailing edge did not occur |