7.4 Digital I/O Pin Behavior During Power-Up Sequences

The following table represents digital I/O pin states corresponding to the device power modes.

Table 7-3. ATWINC15x0B Digital I/O Pin Behavior in Different Device States
Device StateVDDIOCHIP_ENRESETNOutput DriverInput driverPull-Up/Down Resistor (1)

Power_Down:

core supply off

HighLowLowDisabled (Hi-Z)DisabledDisabled

Power-On Reset:

core supply on, hard reset on

HighHighLowDisabled (Hi-Z)DisabledEnabled

Power-On Default:

core supply on, device out of reset but not programmed yet

HighHighHighDisabled (Hi-Z)EnabledEnabled

On_Doze/

On_Transmit/

On_Receive:

core supply on, device programmed by firmware

HighHighHigh

Programmed by firmware for each pin:

Enabled or Disabled

Opposite of Output Driver state

Programmed by firmware for each pin:

Enabled or Disabled

Note:
  1. The pull-up/pull-down resistor value used is 96 kΩ ±10%.