10.1.3 Power Management Unit
The ATWINC15x0B contains an on-chip switching regulator that regulates the VBAT supply for supplying to the rest of the device. It is crucial to place and route the components associated with this circuit correctly to ensure proper operation and especially to reduce any radiated noise that can be picked up by the antenna and can severely reduce the receiver sensitivity. The external components for the PMU consist of two inductors, L5 = 15 nH and L1 = 2.2 μH, and a capacitor, C10 = 4.7 μF. These components must be placed as close as possible to the ATWINC15x0B pin #21 (VSW).
The trace loop from the VSW pin to the VREG_BUCK pin through the components, inductors L5 and L1 and, then, followed by a capacitor, C10, must be as short as possible.
Add a via between C10 and VREG_BUCK to trace out the 1P3V power rail for adding additional capacitors, 10 uF and 0.01 uF, and further route the trace to power the subsystems VDD_VCO, VDD_RF_RX, VDD_RF_TX, VDD_AMS and VDD_SXDIG.
The smaller inductor, L5, must be placed closest to pin #21 (VSW). Current flows from pin #21 (VSW) through L5, then L1, then through C10 to the ground and back to the center ground paddle of the ATWINC15x0B package. Place the components so that the current loop is as small as possible. Ensure that there is a ground via to the inner ground plane right next to the ground pin of C10. The ground return path must be extremely low inductance. Failure to provide a short, heavy ground return between the capacitor and the ATWINC15x0B ground pad results in incorrect operation of the on-chip switching regulator. The following figure shows an example placement and routing of these components. The trace that creates the loop is highlighted in red.
