2.17 After Successful Completion of 2-step IAP, User Design/Logic Cannot Access the Fabric SRAM (LSRAM and uSRAM) Blocks

If LSRAM/uSRAM Read and Write access fails from the fabric path after performing 2-step IAP, perform a system reset or F*F Entry/Exit.

Workaround:

The user application must execute System Reset as soon as the IAP system service is completed. Otherwise, user write and read accesses to LSRAM/uRAM are not possible. The System Reset can be generated with the use of the tamper macro (availably in the Libero SoC Catalog). Immediately after the IAP service, the user logic checks the LSRAM/uRAM access. If access is denied, the user logic sends the reset request/interrupt to the System Controller via the tamper macro (by enabling the RESET Function in the tamper macro configuration window) and then the System Controller executes the system level reset.

For a design example on how to implement the workaround, contact Microchip by creating a new case at microchip.my.site.com/s/newcase.