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Introduction
1 Errata for IGLOO 2 Devices
2.1 VPP Must Be Set to 2.5V When Programming or Writing the eNVM at Industrial Temperature Range
2.2 Overvoltage Support on MSIOs During Flash*Freeze Mode
2.3 Verification of the FPGA Fabric at Junction Temperatures Higher than 50°C Erroneously Indicates a Failure
2.4 DDR_OUT and I/O-Reg Functional Errata due to a Software Bug
2.5 Dedicated Differential I/O Driving the Reference Clock of the CCC May Cause a Functional Failure Due to a Software Bug
2.6 Power-Up Digest is Not Supported
2.7 Programming of the eNVM Must Only Occur as Part of a Bitstream Containing the FPGA Fabric
2.8 Updating eNVM from the FPGA Fabric Requires Changes in the FREQRNG Register
2.9 SYSCTRL_RESET_STATUS Macro is Not Supported
2.10 Zeroization is Not Supported
2.11 The System Controller RC Oscillator Runs at 25 MHz After a Programming Recovery Operation
2.12 ECC Point-Multiplication Service and ECC Point-Addition System Service are Not Supported
2.13 Programming the FPGA Fabric Can Occur Only at Room Temperature
2.14 Programming the eNVM Blocks Needs to Occur Independent of the Fabric
2.15 PCIe Hot Reset Support Requires a Soft Reset Solution
2.16 eNVM1 Becomes Inaccessible to FPGA Fabric Master After Executing SRAM-PUF Services
2.17 After Successful Completion of 2-step IAP, User Design/Logic Cannot Access the Fabric SRAM (LSRAM and uSRAM) Blocks
2.18 SRAM-PUF System Services may Take Two to Three Seconds to Complete
2.19 The I/Os State during Programming is Changed from Z to Weak Pull-Up
2.20 For S (Security) Grade Devices, User Must Not Enable Write Protection for Protected 4 K Regions, Also Known as Special Sectors in the eNVM
2.21 Users Must Not Set Page Lock in eNVM0 for the 060 Device and eNVM1 for 090/150 Devices
4 Revision History

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.