26.5.6 Master Baud Rate
Name: | MBAUD |
Offset: | 0x06 |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
BAUD[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:0 – BAUD[7:0] Baud Rate
This bit field is used to derive the SCL high and low time. It must be
written while the master is disabled. The master can be disabled by writing
‘0
’ to the Enable TWI Master (ENABLE) bit from the Master
Control A (TWIn.MCTRLA) register.
Refer to the 26.3.2.2.1 Clock Generation section for more information on how to calculate the frequency of the SCL.