3.5.3 SIMD Mode

In SIMD mode, the 18 x 19 multiplier operates as two independent 9 x 9 multipliers. It doubles the number of multiplications for smaller widths (say 9 bits). It computes two independent 9 x 9-bit multiplications using the 9-bit upper pre-adder. The lower pre-adder is not used (D[8:0] input must be zero). The lower portion of the final adder is not used, that is, E[17:0] is ignored and C[17:0] must be zero. The ARSHFT17 input is also ignored in SIMD mode.

SIMD mode implements the following output equations:

P[17:0] = (B[8:0] x A[8:0]) + CARRYIN

P[47:18] = ((B[17:9] ± D[17:9]) x A[17:9]) + C[47:18] + E[47:18]

The following figure shows the functional block diagram of the Math block in SIMD mode.

Figure 3-8. Functional Block Diagram of the Math Block in SIMD Mode