2 Embedded Memory Blocks

The PolarFire family has the following memory blocks:

LSRAM—The embedded large SRAM blocks are 20Kbits each with 20-bit width and a depth of 1024 locations. The LSRAMs can be configured as either dual port or two port memories. The number of LSRAMs available in a device varies as shown in Table and Table . The LSRAMs support ECC when configured in 33-bit data width in two-port mode. LSRAMs can be configured in various modes as shown in Table 2-1. LSRAMs can be initialized with user data during power-up.
μSRAM—The embedded 768-bit SRAM blocks (RAM64x12) are arranged in multiple rows within the fabric and can be accessed through the fabric routing architecture. The number of available μSRAM blocks depends on the specific device, as shown in Table and Table . μSRAMs can be initialized during power-up.
μPROM—The embedded non-volatile PROM is arranged in a single row at the bottom of the fabric and is read only through the fabric interface. μPROM is programmed with the FPGA bitstream during fabric programming and it cannot be programmed independently. μPROM is used to store the initialization data for LSRAM and μSRAM and other user data.
sNVM—Each PolarFire FPGA has 56 KB of Secure Non-volatile Memory (sNVM). The sNVM can be used to initialize LSRAM and μSRAMs with secure data. sNVM can be accessed through the system services. The usable sNVM is 48 KB on RTPF500ZT, RTPFS160ZT and RTPFS460ZT due to the addition of built-in SECDED ECC.

Along with the above memory blocks, the PolarFire SoC and RT PolarFire SoC family includes the following memory block:

eNVM (PolarFire SoC and RT PolarFire SoC Only)—The 128 KB of eNVM is located in the MSS. eNVM is used to store the first stage bootloader program for booting the E51 monitor core. eNVM is programmed with the device bitstream during the device programming, it cannot be programmed independently.
Important: eNVM is 102 KB for RT PolarFire SoC devices when using added ECC for radiation mitigation. For more information, see AN4903: Differences Between RT PolarFire RTPF500T and RTPF500ZT FPGAs.

The following table lists the features of the memory blocks of the PolarFire family.

Table 2-1. LSRAM, μSRAM, μPROM, and sNVM Features
Feature	LSRAM	μSRAM	μPROM	sNVM	eNVM (Only PolarFire SoC and RT PolarFire SoC)
Memory size	20,480 bits/block	768-bit/block	See Table and Table	56 Kbytes 48 Kbytes (RTPF500ZT, RTPFS160ZT and RTPFS460ZT)	128 Kbytes. See the preceding note.
Memory Configuration Options	16K × 1, 8K × 2, 4K × 5, 2K × 10, 1K × 20, 512 × 40¹, and 512 × 33¹ (with ECC)	64 × 12	Up to 64K × 9	Not Applicable	Not Applicable
Number of ports	2 read ports, 2 write ports	1 read port, 1 write port	1 read port	Not Applicable	Not Applicable
Memory modes	True dual-port and two-port	Two-port	Single-port	Not Applicable	Not Applicable
Read operation	Synchronous	Synchronous/Asynchronous	Asynchronous	Through system service calls	Asynchronous
Write operation	Simple write, feed-through write, and read-before-write	Simple write	Only during device programming	During device programming and System Service calls	During device programming
ECC	Available for two-port mode (512 × 33) only	Not available	Not Applicable	Built-in for RTPF500ZT, RTPFS160ZT and RTPFS460ZT.	Not Applicable for MPFS devices. Software defined ECC is available for RTPFS160ZT and RTPFS460ZT.

Note: