34.6.2.5 I²C Client Operation

The I²C client is byte-oriented and interrupt-based. The number of interrupts generated is kept at a minimum by automatic handling of most events. The software driver complexity and code size are reduced by auto-triggering of operations and a special smart mode, which can be enabled by the Smart Mode Enable bit in the Control A register (CTRLA.SMEN).

The I²C client has two interrupt strategies.

When SCL Stretch Mode bit (CTRLA.SCLSM) is ‘0’, SCL is stretched before or after the acknowledge bit. In this mode, the I²C client operates according to Figure 34-9. The circles labelled Sn (S1, S2..) indicate the nodes the bus logic can jump to based on software or hardware interaction.

This diagram is used as a reference for the description of the I²C client operation throughout the document.

In the second strategy (CTRLA.SCLSM = 1), interrupts only occur after the ACK bit is sent as illustrated Figure 34-10. This strategy can be used when it is not necessary to check DATA before acknowledging. For host reads, an address and data interrupt is issued simultaneously after the address acknowledge. However, for host writes, the first data interrupt is seen after the first data byte is received by the client and the acknowledge bit is sent to the host.