34.6.2.5.2 Receiving Address Packets (SCLSM = 1)

When SCLSM = 1, the I²C client stretches the SCL line only after an ACK as illustrated in Figure 34-10. When the I²C client is properly configured, it waits for a Start condition to be detected.

When a Start condition is detected, the successive address packet is received and checked by the address match logic.

If the received address is not a match, the packet is rejected and the I²C client waits for a new Start condition.

If the address matches, the acknowledge action, as configured by the Acknowledge Action bit Control B register (CTRLB.ACKACT), is sent and the Address Match bit in the Interrupt Flag register (INTFLAG.AMATCH) is set. SCL is stretched until the I²C client clears INTFLAG.AMATCH. As the I²C client holds the clock by forcing SCL low, the software is given unlimited time to respond to the address.

The direction of a transaction is determined by reading the Read/Write Direction bit in the Status register (STATUS.DIR). This bit is updated only when a valid address packet is received.

If the Transmit Collision bit in the Status register (STATUS.COLL) is set, the last packet addressed to the I²C client had a packet collision. A collision causes the SDA and SCL lines to be released without any notification to software. The next AMATCH interrupt is, therefore, the first indication of the previous packet’s collision. Collisions are intended to follow the SMBus Address Resolution Protocol (ARP).

After the address packet is received from the I²C host, INTFLAG.AMATCH can be set to ‘1’ to clear it.