35.5.1 I/O Lines
Using the QSPI I/O lines requires the I/O pins to be configured using the System Configuration registers (see System Configuration and Register Locking (CFG) from Related Links) (QSPI_HSEN of CFGCON1/DEVCFG1 register) for direct or PPS. If QSPI pins are selected through PPS, the PPS registers have to be configured (see I/O Ports and Peripheral Pin Select (PPS) from Related Links).
If QSPI_HSEN = 1, QSPI uses dedicated pins.
If QSPI_HSEN = 0, QSPI uses PPS path and I/O pins are multiplexed to pins groups defined in PPS section.