15.21.2 NVMCON2 - Programming Control 2 Register

Name:	NVMCON2
Offset:	0x10
Reset:	0x011F4000
Property:	-


Bit	31	30	29	28	27	26	25	24
	ERS[3:0]							SLEEP
Access	R/W	R/W	R/W	R/W				R/W
Reset	0	0	0	0				1


Bit	23	22	21	20	19	18	17	16
				WS[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				1	1	1	1	1


Bit	15	14	13	12	11	10	9	8
		TEMP	CREAD1	VREAD1			RETRY[1:0]
Access		R	R/W	R/W			R/W	R/W
Reset		1	0	0			0	0


Bit	7	6	5	4	3	2	1	0

Access
Reset

Bits 31:28 – ERS[3:0] Erase Retry State

The software uses these bits to track the software state of the erase retry procedure in the event of a system Reset (MCLR) or Brown-out Reset (BOR) event.

Bit 24 – SLEEP Power Down in Sleep Mode

Note: This field can only be modified when the NVMKEY unlock sequence is satisfied.

Value	Description
1	Configures Flash for power down when the system is in Sleep mode
0	Configures Flash for standby when the system is in Sleep mode

Bits 20:16 – WS[4:0] Flash Access Wait State Control for VREAD1 = 1

Note:

When VREAD1 = 1, WS[4:0] only affects the memory containing NVMADDR[31:0].
The NVMKEY unlock sequence must be satisfied to modify this field.

Value	Description
11111	31 wait states (32 total system clocks)
11110	30 wait states (31 total system clocks)
...
00010	2 wait states (3 total system clocks)
00001	1 wait state (2 total system clocks)
00000	0 wait state (1 total system clock)

Bit 14 – TEMP Operating Temperature Control bit

This bit is always read as ‘1’ for the PIC32CX-BZ3 device.

Bit 13 – CREAD1 Compare Read of Logic 1 bit

Compare read 1 causes all bits in a Flash Word (including ECC if it exists) to be evaluated during the read. If all bits are 1, the lowest Word in the Flash Word evaluates to 0x0000_0001, all other Words are 0x0001_0000. If any bit is 0, the read evaluates to 0x0000_0000 for all Words in the Flash Word.

Note:

When using erase retry in an ECC Flash system, use CREAD1 = 1.
To modify this field, satisfy the NVMKEY unlock sequence.

Value	Description
1	Compare read enabled, only if VREAD1 = `1`
0	Compare read disabled

Bit 12 – VREAD1 Verify Read of logic 1 Control bit

Note:

When VREAD1 = 1, Flash Wait state control is from WS[] for the memory containing NVMADDR[].
Using erase retry and verify read procedure increases the life of the Flash memory.
This field becomes modifiable only when NVMCON.WR == 0 and the NVMKEY unlock sequence is satisfied.

Value	Description
1	Selects erase retry procedure with verify read
0	Selects single erase without verify read

Bits 9:8 – RETRY[1:0] Erase Retry Control bit, only used when VREAD1 = 1

Note: This field becomes modifiable only when NVMCON.WR == 0.

Value	Description
11	Erase strength for fourth up to seventh retry cycle
10	Erase strength for third retry cycle
01	Erase strength for second retry cycle
00	Erase strength for first retry cycle