6.11.2 Tri-state Functions for PortA

The TRISA register configures the data direction flow through port I/O pins.
Name: TRISA
Offset: 0x10
Reset: 0x0
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
  TRISAxTRISAx  TRISAxTRISAxTRISAx 
Access R/WR/WR/WR/WR/W 
Reset 00000 
Bit 76543210 
 TRISAxTRISAxTRISAxTRISAxTRISAxTRISAxTRISAxTRISAx 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0,1,2,3,4,5,6,7,8,9,10,13,14 – TRISAx (x = 0 to 14; x = 0 for bit0 mapped to PA0, … x = 14 for bit14 mapped to PA14) Tri-state pins for PortA

The tri-state data direction bit configures the selected I/O pin of Port A as an input or output.
ValueDescription
1 Configures the I/O as input
0 Configures the I/O as output