1.4 Error Correction and Detection Capabilities of Embedded Block RAMs

PolarFire devices include SRAM blocks as part of the hard IP blocks and FPGA fabric. Except for the uSRAM blocks, all other embedded RAM blocks are implemented with error detection and correction (ECC) capabilities to protect them from SEU effects.

The following table lists the ECC support in embedded RAM blocks.
Table 1-1. ECC Support in Embedded Block RAMs
BlockComponentECC
FPGA FabricLSRAMYes(1)
FPGA FabricuSRAMNo
User CryptoprocessorCode and Data RAMsYes
(1) For LSRAMs, the ECC operation is supported only in two-port mode with a data width of 33-bit. See UG0680: PolarFire FPGA Fabric User Guide for more information.