25.10.18 Channel Status Cell Count Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CHSTATCCk |
| Offset: | 0x94 + k*0x50 [k=0..15] |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CBTC[10:8] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CBTC[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 10:0 – CBTC[10:0] Bytes Transferred in the Cell Counter
Reports the number of bytes transferred in the cell.
0x400 = 1024 bytes transferred
0x001 = 1 byte transferred
0x000 = 0 bytes transferred